In that case, certainly if the switching is on/off (rather than dimming), the voltage across the switch ought to be very low (almost zero with a mechanical switch, but also very low with a solid state one) in the 'on' state, so I don't really understand the 'few volts' you expect to find across the switch (in it's 'on' state) to use for brief pulsed charging of capacitor/battery. What am I missing?
You can't do it with a mechanical switch, but with an electronic switch you delay the turn on for each half-cycle until there is enough voltage across the switch to charge your capacitor - basically it's a dimmer with a fixed "near enough full on" setting.
For a resistive load, the effect of this delay (unless it's quite a long one) is negligible in terms of reduction in lamp brightness.
Now, unless i've cocked things up badly, if you wanted (say) around 10V on your cap, and used low forward volt drop diodes, then you could hold off until the mains was up to (say) 12V. That's about 3.25% of mains peak voltage, and occurs less that 2˚ into the cycle. I can't be bothered right now, but I think you'll find that if you integrate sin(v)^2 from 2˚ to 180˚, and convert to an RMS value - you'll find the difference is very little from doing the same thing over the full half cycle.
There are many micro processors that are normally asleep until woken up by a stimulus ( from a wireless receiver ) , perform what ever function is needed and then go back to sleep.
They still need power, even in sleep states.
But that power is generally "incredibly small" for devices designed for that type of application. In fact, certain CMOS devices take virtually unmeasurable power (it's only the leakage current through the gate insulation) in a static state. There are certainly processors which take a matter of nW in sleep modes.
As an example, picked at more or less random ...
http://ww1.microchip.com/downloads/en/DeviceDoc/41291G.pdf, starting on page 249
RAM Data Retention Voltage 1.5V Device in Sleep mode
Power-down Base Current Typ 0.05µA Max 1.2µA
So it's possible to power down the, and keep it's memory intact, with typically 50nA @ 1.5V min. Normally you'd keep the supply voltage above it's minimum operating voltage (only 2V for low clock speeds), that way when a stimulus arrives, the device can "spring to life", do something, then power down again.
If you chose (say) 3V, that's still only (typically) 150nW, max 3.6µW in sleep mode.
That's how so much battery operated equipment works these days - small devices which shut down the oscillator when idle and go into a DC mode where CMOS takes naff all power. It's a basic issue with MOS devices that the bulk of the power for a gate is typically taken in charging and discharging the capacitance of the gate (the gate and channel effectively form a capacitor, with the metal oxide insulation layer as the dielectric) - the more often you do that (ie the faster you run a circuit), the more power it dissipates.
That's why one of the earlier suggestions was to charge some form of storage (whether rechargeable cell or supercap) when in the off state to run the device when on. If the power budget is sufficiently small then that might work. If the light was left on, then the device would need to turn it off every so often to recharge - but with the fast charge ability of a cap, this might only mean running the load off the charging circuit for half a cycle every so often.
To elaborate, when the cap is running down, on one half cycle you leave the switch off and charge the cap using as much current as the load will pass until the cap is charged. Then turn on the switch. This won't affect the load as it'll still see a supply current, just passing through the charging circuit (with say 10-20V drop) rather than the switch element.
Still an interesting design challenge - to make a supply circuit that will "fast charge" a cap with only a few volts across it (to avoid flashing the light each charge cycle), but while also coping with 370V peak across it when the light is off.
Actually I can see one way of doing it. Turn a transistor on at each zero crossing or whenever the rectified mains is below the desired cap charging voltage, and turn it off whenever the cap is up to the desired voltage - perhaps with a bit of hysteresis. I suppose it's a variation on a hysteresis regulator, but using the load impedance as the current limiter rather than an inductor.
It would also mean only drawing current through the load when the voltage is low, which might possibly be enough to prevent CFLs or LEDs glowing or flashing.
Certainly an interesting design challenge.